BEGIN:VCALENDAR VERSION:2.0 PRODID:-//CAD MicroSolutions Inc. - ECPv6.15.15//NONSGML v1.0//EN CALSCALE:GREGORIAN METHOD:PUBLISH X-WR-CALNAME:CAD MicroSolutions Inc. X-ORIGINAL-URL:https://www.cadmicro.com X-WR-CALDESC:Events for CAD MicroSolutions Inc. REFRESH-INTERVAL;VALUE=DURATION:PT1H X-Robots-Tag:noindex X-PUBLISHED-TTL:PT1H BEGIN:VTIMEZONE TZID:America/Toronto BEGIN:DAYLIGHT TZOFFSETFROM:-0500 TZOFFSETTO:-0400 TZNAME:EDT DTSTART:20230312T070000 END:DAYLIGHT BEGIN:STANDARD TZOFFSETFROM:-0400 TZOFFSETTO:-0500 TZNAME:EST DTSTART:20231105T060000 END:STANDARD BEGIN:DAYLIGHT TZOFFSETFROM:-0500 TZOFFSETTO:-0400 TZNAME:EDT DTSTART:20240310T070000 END:DAYLIGHT BEGIN:STANDARD TZOFFSETFROM:-0400 TZOFFSETTO:-0500 TZNAME:EST DTSTART:20241103T060000 END:STANDARD BEGIN:DAYLIGHT TZOFFSETFROM:-0500 TZOFFSETTO:-0400 TZNAME:EDT DTSTART:20250309T070000 END:DAYLIGHT BEGIN:STANDARD TZOFFSETFROM:-0400 TZOFFSETTO:-0500 TZNAME:EST DTSTART:20251102T060000 END:STANDARD END:VTIMEZONE BEGIN:VEVENT DTSTART;TZID=America/Toronto:20240506T090000 DTEND;TZID=America/Toronto:20240510T170000 DTSTAMP:20260422T073311 CREATED:20240207T145534Z LAST-MODIFIED:20240207T145752Z UID:56128-1714986000-1715360400@www.cadmicro.com SUMMARY:SOLIDWORKS Parts\, Assemblies & Drawings – Cambridge DESCRIPTION:Live \n \n \n \n \n \n \n \n Webinar \n \n \n \n \n \n \n \n March 26 @ 11am ET \n \n \n \n \n \n \n \n \n \n \n \n Leveraging Constraint Sets for DDRx Design in Allegro X \n \n \n \n \n \n \n \n \n \n \n \n Today’s PCB designers must create increasingly complex boards and systems. With tighter design densities and a demand for faster turnaround times\, they must quickly route critical signals while staying within electrical and physical constraints. Allegro X simplifies this process with advanced routing tools that help speed up the routing of high-speed signals. Utilizing a constraint-driven design approach\, PCB designers can rapidly route and verify complex bus structures.  Join a webinar by Cadence and learn about: Define impedance requirements through the Cross Section EditorUse Constraint Sets (CSets) to apply rules to bus structures -e.g. DDRx buses quickly Leverage Timing vision to route signalsUse Auto-interactive delay tuning to verify compliance with constraints  Save your spot now\, we hope to see you there. \n \n \n \n \n \n \n Register Now URL:https://www.cadmicro.com/event/solidworks-parts-assemblies-drawings-cambridge-2/ LOCATION:CAD Micro – Cambridge\, 225 Pinebush Road\, Unit 102\, Cambridge\, Ontario\, N1T1B9\, Canada CATEGORIES:Training ATTACH;FMTTYPE=image/jpeg:https://www.cadmicro.com/wp-content/uploads/SW-CAD-Training-Thumbnail.jpg ORGANIZER;CN="CAD Micro":MAILTO:contact@cadmicro.com END:VEVENT BEGIN:VEVENT DTSTART;TZID=America/Toronto:20240502T130000 DTEND;TZID=America/Toronto:20240502T140000 DTSTAMP:20260422T073311 CREATED:20240327T142228Z LAST-MODIFIED:20240417T191049Z UID:59550-1714654800-1714658400@www.cadmicro.com SUMMARY:Innovate with CAD Micro: ACIDO’s Tools and Tech Thursday DESCRIPTION:Live \n \n \n \n \n \n \n \n Webinar \n \n \n \n \n \n \n \n March 26 @ 11am ET \n \n \n \n \n \n \n \n \n \n \n \n Leveraging Constraint Sets for DDRx Design in Allegro X \n \n \n \n \n \n \n \n \n \n \n \n Today’s PCB designers must create increasingly complex boards and systems. With tighter design densities and a demand for faster turnaround times\, they must quickly route critical signals while staying within electrical and physical constraints. Allegro X simplifies this process with advanced routing tools that help speed up the routing of high-speed signals. Utilizing a constraint-driven design approach\, PCB designers can rapidly route and verify complex bus structures.  Join a webinar by Cadence and learn about: Define impedance requirements through the Cross Section EditorUse Constraint Sets (CSets) to apply rules to bus structures -e.g. DDRx buses quickly Leverage Timing vision to route signalsUse Auto-interactive delay tuning to verify compliance with constraints  Save your spot now\, we hope to see you there. \n \n \n \n \n \n \n Register Now URL:https://www.cadmicro.com/event/innovate-with-cad-micro-acidos-tools-and-tech-thursday/ CATEGORIES:Webinar ATTACH;FMTTYPE=image/jpeg:https://www.cadmicro.com/wp-content/uploads/ACIDO-Event-Website-Image.jpg ORGANIZER;CN="CAD Micro":MAILTO:contact@cadmicro.com END:VEVENT BEGIN:VEVENT DTSTART;TZID=America/Toronto:20240502T110000 DTEND;TZID=America/Toronto:20240502T120000 DTSTAMP:20260422T073311 CREATED:20240425T202254Z LAST-MODIFIED:20240425T204626Z UID:61006-1714647600-1714651200@www.cadmicro.com SUMMARY:Live Demo of the UltiMaker Factor 4 DESCRIPTION:Live \n \n \n \n \n \n \n \n Webinar \n \n \n \n \n \n \n \n March 26 @ 11am ET \n \n \n \n \n \n \n \n \n \n \n \n Leveraging Constraint Sets for DDRx Design in Allegro X \n \n \n \n \n \n \n \n \n \n \n \n Today’s PCB designers must create increasingly complex boards and systems. With tighter design densities and a demand for faster turnaround times\, they must quickly route critical signals while staying within electrical and physical constraints. Allegro X simplifies this process with advanced routing tools that help speed up the routing of high-speed signals. Utilizing a constraint-driven design approach\, PCB designers can rapidly route and verify complex bus structures.  Join a webinar by Cadence and learn about: Define impedance requirements through the Cross Section EditorUse Constraint Sets (CSets) to apply rules to bus structures -e.g. DDRx buses quickly Leverage Timing vision to route signalsUse Auto-interactive delay tuning to verify compliance with constraints  Save your spot now\, we hope to see you there. \n \n \n \n \n \n \n Register Now URL:https://www.cadmicro.com/event/live-demo-of-the-ultimaker-factor-4/ CATEGORIES:Webinar ATTACH;FMTTYPE=image/jpeg:https://www.cadmicro.com/wp-content/uploads/SDB-00082-1.jpg END:VEVENT BEGIN:VEVENT DTSTART;TZID=America/Toronto:20240501T120000 DTEND;TZID=America/Toronto:20240501T160000 DTSTAMP:20260422T073311 CREATED:20240129T143428Z LAST-MODIFIED:20240429T151823Z UID:55615-1714564800-1714579200@www.cadmicro.com SUMMARY:Advanced Manufacturing Open House DESCRIPTION:Live \n \n \n \n \n \n \n \n Webinar \n \n \n \n \n \n \n \n March 26 @ 11am ET \n \n \n \n \n \n \n \n \n \n \n \n Leveraging Constraint Sets for DDRx Design in Allegro X \n \n \n \n \n \n \n \n \n \n \n \n Today’s PCB designers must create increasingly complex boards and systems. With tighter design densities and a demand for faster turnaround times\, they must quickly route critical signals while staying within electrical and physical constraints. Allegro X simplifies this process with advanced routing tools that help speed up the routing of high-speed signals. Utilizing a constraint-driven design approach\, PCB designers can rapidly route and verify complex bus structures.  Join a webinar by Cadence and learn about: Define impedance requirements through the Cross Section EditorUse Constraint Sets (CSets) to apply rules to bus structures -e.g. DDRx buses quickly Leverage Timing vision to route signalsUse Auto-interactive delay tuning to verify compliance with constraints  Save your spot now\, we hope to see you there. \n \n \n \n \n \n \n Register Now URL:https://www.cadmicro.com/event/advanced-manufacturing-open-house-7/ LOCATION:CAD Micro\, 30 International Blvd\, Unit 1\, Toronto\, Ontario\, M9W 1A2\, Canada CATEGORIES:In Person Event ATTACH;FMTTYPE=image/jpeg:https://www.cadmicro.com/wp-content/uploads/SmartMTX-Event-Page-Image-1.jpg ORGANIZER;CN="CAD Micro":MAILTO:contact@cadmicro.com END:VEVENT BEGIN:VEVENT DTSTART;TZID=America/Toronto:20240430T110000 DTEND;TZID=America/Toronto:20240430T120000 DTSTAMP:20260422T073311 CREATED:20240319T181958Z LAST-MODIFIED:20240319T182349Z UID:59069-1714474800-1714478400@www.cadmicro.com SUMMARY:SOLIDWORKS CAM and CAMWorks – Getting Started DESCRIPTION:Live \n \n \n \n \n \n \n \n Webinar \n \n \n \n \n \n \n \n March 26 @ 11am ET \n \n \n \n \n \n \n \n \n \n \n \n Leveraging Constraint Sets for DDRx Design in Allegro X \n \n \n \n \n \n \n \n \n \n \n \n Today’s PCB designers must create increasingly complex boards and systems. With tighter design densities and a demand for faster turnaround times\, they must quickly route critical signals while staying within electrical and physical constraints. Allegro X simplifies this process with advanced routing tools that help speed up the routing of high-speed signals. Utilizing a constraint-driven design approach\, PCB designers can rapidly route and verify complex bus structures.  Join a webinar by Cadence and learn about: Define impedance requirements through the Cross Section EditorUse Constraint Sets (CSets) to apply rules to bus structures -e.g. DDRx buses quickly Leverage Timing vision to route signalsUse Auto-interactive delay tuning to verify compliance with constraints  Save your spot now\, we hope to see you there. \n \n \n \n \n \n \n Register Now URL:https://www.cadmicro.com/event/solidworks-cam-and-camworks-getting-started-4/ CATEGORIES:Webinar ATTACH;FMTTYPE=image/jpeg:https://www.cadmicro.com/wp-content/uploads/SW-CAM-and-CW-Getting-Started-1.jpg END:VEVENT BEGIN:VEVENT DTSTART;TZID=America/Toronto:20240430T090000 DTEND;TZID=America/Toronto:20240502T170000 DTSTAMP:20260422T073311 CREATED:20240130T150515Z LAST-MODIFIED:20240130T202751Z UID:55777-1714467600-1714669200@www.cadmicro.com SUMMARY:SOLIDWORKS Plastics Training – Online DESCRIPTION:Live \n \n \n \n \n \n \n \n Webinar \n \n \n \n \n \n \n \n March 26 @ 11am ET \n \n \n \n \n \n \n \n \n \n \n \n Leveraging Constraint Sets for DDRx Design in Allegro X \n \n \n \n \n \n \n \n \n \n \n \n Today’s PCB designers must create increasingly complex boards and systems. With tighter design densities and a demand for faster turnaround times\, they must quickly route critical signals while staying within electrical and physical constraints. Allegro X simplifies this process with advanced routing tools that help speed up the routing of high-speed signals. Utilizing a constraint-driven design approach\, PCB designers can rapidly route and verify complex bus structures.  Join a webinar by Cadence and learn about: Define impedance requirements through the Cross Section EditorUse Constraint Sets (CSets) to apply rules to bus structures -e.g. DDRx buses quickly Leverage Timing vision to route signalsUse Auto-interactive delay tuning to verify compliance with constraints  Save your spot now\, we hope to see you there. \n \n \n \n \n \n \n Register Now URL:https://www.cadmicro.com/event/solidworks-plastics-training-online-april/ CATEGORIES:Training ATTACH;FMTTYPE=image/jpeg:https://www.cadmicro.com/wp-content/uploads/Sim-Training-Thumbnail.jpg ORGANIZER;CN="CAD Micro":MAILTO:contact@cadmicro.com END:VEVENT BEGIN:VEVENT DTSTART;TZID=America/Toronto:20240430T090000 DTEND;TZID=America/Toronto:20240430T160000 DTSTAMP:20260422T073311 CREATED:20240129T205202Z LAST-MODIFIED:20240129T205636Z UID:55699-1714467600-1714492800@www.cadmicro.com SUMMARY:DEX Expo - Winnipeg DESCRIPTION:Live \n \n \n \n \n \n \n \n Webinar \n \n \n \n \n \n \n \n March 26 @ 11am ET \n \n \n \n \n \n \n \n \n \n \n \n Leveraging Constraint Sets for DDRx Design in Allegro X \n \n \n \n \n \n \n \n \n \n \n \n Today’s PCB designers must create increasingly complex boards and systems. With tighter design densities and a demand for faster turnaround times\, they must quickly route critical signals while staying within electrical and physical constraints. Allegro X simplifies this process with advanced routing tools that help speed up the routing of high-speed signals. Utilizing a constraint-driven design approach\, PCB designers can rapidly route and verify complex bus structures.  Join a webinar by Cadence and learn about: Define impedance requirements through the Cross Section EditorUse Constraint Sets (CSets) to apply rules to bus structures -e.g. DDRx buses quickly Leverage Timing vision to route signalsUse Auto-interactive delay tuning to verify compliance with constraints  Save your spot now\, we hope to see you there. \n \n \n \n \n \n \n Register Now URL:https://www.cadmicro.com/event/dex-expo-winnipeg/ LOCATION:Victoria Inn Hotel & Convention Centre\, 1808 Wellington Ave\, Winnipeg\, Manitoba\, R3H 0G3\, Canada CATEGORIES:Trade Show ATTACH;FMTTYPE=image/jpeg:https://www.cadmicro.com/wp-content/uploads/DEX-Show-Website-banner-Image.jpg END:VEVENT BEGIN:VEVENT DTSTART;TZID=America/Toronto:20240429T083000 DTEND;TZID=America/Toronto:20240502T123000 DTSTAMP:20260422T073311 CREATED:20240130T150221Z LAST-MODIFIED:20240130T201021Z UID:55771-1714379400-1714653000@www.cadmicro.com SUMMARY:SOLIDWORKS CAM Professional Training – Online DESCRIPTION:Live \n \n \n \n \n \n \n \n Webinar \n \n \n \n \n \n \n \n March 26 @ 11am ET \n \n \n \n \n \n \n \n \n \n \n \n Leveraging Constraint Sets for DDRx Design in Allegro X \n \n \n \n \n \n \n \n \n \n \n \n Today’s PCB designers must create increasingly complex boards and systems. With tighter design densities and a demand for faster turnaround times\, they must quickly route critical signals while staying within electrical and physical constraints. Allegro X simplifies this process with advanced routing tools that help speed up the routing of high-speed signals. Utilizing a constraint-driven design approach\, PCB designers can rapidly route and verify complex bus structures.  Join a webinar by Cadence and learn about: Define impedance requirements through the Cross Section EditorUse Constraint Sets (CSets) to apply rules to bus structures -e.g. DDRx buses quickly Leverage Timing vision to route signalsUse Auto-interactive delay tuning to verify compliance with constraints  Save your spot now\, we hope to see you there. \n \n \n \n \n \n \n Register Now URL:https://www.cadmicro.com/event/solidworks-cam-professional-training-online-2/ CATEGORIES:Training ATTACH;FMTTYPE=image/jpeg:https://www.cadmicro.com/wp-content/uploads/CAM-Training-Thumbnail.jpg ORGANIZER;CN="CAD Micro":MAILTO:contact@cadmicro.com END:VEVENT BEGIN:VEVENT DTSTART;TZID=America/Toronto:20240425T110000 DTEND;TZID=America/Toronto:20240425T114500 DTSTAMP:20260422T073311 CREATED:20240319T181339Z LAST-MODIFIED:20240319T181831Z UID:59061-1714042800-1714045500@www.cadmicro.com SUMMARY:Reducing Machine Cycle Time with VoluMill\, VoluTurn\, and PrimeTurning™ DESCRIPTION:Live \n \n \n \n \n \n \n \n Webinar \n \n \n \n \n \n \n \n March 26 @ 11am ET \n \n \n \n \n \n \n \n \n \n \n \n Leveraging Constraint Sets for DDRx Design in Allegro X \n \n \n \n \n \n \n \n \n \n \n \n Today’s PCB designers must create increasingly complex boards and systems. With tighter design densities and a demand for faster turnaround times\, they must quickly route critical signals while staying within electrical and physical constraints. Allegro X simplifies this process with advanced routing tools that help speed up the routing of high-speed signals. Utilizing a constraint-driven design approach\, PCB designers can rapidly route and verify complex bus structures.  Join a webinar by Cadence and learn about: Define impedance requirements through the Cross Section EditorUse Constraint Sets (CSets) to apply rules to bus structures -e.g. DDRx buses quickly Leverage Timing vision to route signalsUse Auto-interactive delay tuning to verify compliance with constraints  Save your spot now\, we hope to see you there. \n \n \n \n \n \n \n Register Now URL:https://www.cadmicro.com/event/reducing-machine-cycle-time-with-volumill-voluturn-and-primeturning/ CATEGORIES:Webinar ATTACH;FMTTYPE=image/jpeg:https://www.cadmicro.com/wp-content/uploads/VoluMill-4.jpg END:VEVENT BEGIN:VEVENT DTSTART;TZID=America/Toronto:20240424T090000 DTEND;TZID=America/Toronto:20240425T170000 DTSTAMP:20260422T073311 CREATED:20240130T145858Z LAST-MODIFIED:20240130T201316Z UID:55764-1713949200-1714064400@www.cadmicro.com SUMMARY:SOLIDWORKS Surface Modeling Training – Online DESCRIPTION:Live \n \n \n \n \n \n \n \n Webinar \n \n \n \n \n \n \n \n March 26 @ 11am ET \n \n \n \n \n \n \n \n \n \n \n \n Leveraging Constraint Sets for DDRx Design in Allegro X \n \n \n \n \n \n \n \n \n \n \n \n Today’s PCB designers must create increasingly complex boards and systems. With tighter design densities and a demand for faster turnaround times\, they must quickly route critical signals while staying within electrical and physical constraints. Allegro X simplifies this process with advanced routing tools that help speed up the routing of high-speed signals. Utilizing a constraint-driven design approach\, PCB designers can rapidly route and verify complex bus structures.  Join a webinar by Cadence and learn about: Define impedance requirements through the Cross Section EditorUse Constraint Sets (CSets) to apply rules to bus structures -e.g. DDRx buses quickly Leverage Timing vision to route signalsUse Auto-interactive delay tuning to verify compliance with constraints  Save your spot now\, we hope to see you there. \n \n \n \n \n \n \n Register Now URL:https://www.cadmicro.com/event/solidworks-surface-modeling-training-online-4/ CATEGORIES:Training ATTACH;FMTTYPE=image/jpeg:https://www.cadmicro.com/wp-content/uploads/SW-CAD-Training-Thumbnail.jpg ORGANIZER;CN="CAD Micro":MAILTO:contact@cadmicro.com END:VEVENT BEGIN:VEVENT DTSTART;TZID=America/Toronto:20240424T083000 DTEND;TZID=America/Toronto:20240424T150000 DTSTAMP:20260422T073311 CREATED:20240322T172744Z LAST-MODIFIED:20240322T174407Z UID:59345-1713947400-1713970800@www.cadmicro.com SUMMARY:Enhancing Reliability through Advanced Testing and Simulation DESCRIPTION:Live \n \n \n \n \n \n \n \n Webinar \n \n \n \n \n \n \n \n March 26 @ 11am ET \n \n \n \n \n \n \n \n \n \n \n \n Leveraging Constraint Sets for DDRx Design in Allegro X \n \n \n \n \n \n \n \n \n \n \n \n Today’s PCB designers must create increasingly complex boards and systems. With tighter design densities and a demand for faster turnaround times\, they must quickly route critical signals while staying within electrical and physical constraints. Allegro X simplifies this process with advanced routing tools that help speed up the routing of high-speed signals. Utilizing a constraint-driven design approach\, PCB designers can rapidly route and verify complex bus structures.  Join a webinar by Cadence and learn about: Define impedance requirements through the Cross Section EditorUse Constraint Sets (CSets) to apply rules to bus structures -e.g. DDRx buses quickly Leverage Timing vision to route signalsUse Auto-interactive delay tuning to verify compliance with constraints  Save your spot now\, we hope to see you there. \n \n \n \n \n \n \n Register Now URL:https://www.cadmicro.com/event/enhancing-reliability-through-advanced-testing-and-simulation/ LOCATION:Megalab Group Inc.\, 150 Addison Hall Circle\, Aurora\, Ontario\, L4G3X8\, Canada CATEGORIES:In Person Event ATTACH;FMTTYPE=image/jpeg:https://www.cadmicro.com/wp-content/uploads/Enhancing-Reliability-Through-Advanced-Testing-Sim-Event-Website.jpg ORGANIZER;CN="CAD Micro":MAILTO:contact@cadmicro.com END:VEVENT BEGIN:VEVENT DTSTART;TZID=America/Toronto:20240423T133000 DTEND;TZID=America/Toronto:20240423T160000 DTSTAMP:20260422T073311 CREATED:20240129T162233Z LAST-MODIFIED:20240129T162610Z UID:55668-1713879000-1713888000@www.cadmicro.com SUMMARY:Unleashing the Power of Metal 3D Printing DESCRIPTION:Live \n \n \n \n \n \n \n \n Webinar \n \n \n \n \n \n \n \n March 26 @ 11am ET \n \n \n \n \n \n \n \n \n \n \n \n Leveraging Constraint Sets for DDRx Design in Allegro X \n \n \n \n \n \n \n \n \n \n \n \n Today’s PCB designers must create increasingly complex boards and systems. With tighter design densities and a demand for faster turnaround times\, they must quickly route critical signals while staying within electrical and physical constraints. Allegro X simplifies this process with advanced routing tools that help speed up the routing of high-speed signals. Utilizing a constraint-driven design approach\, PCB designers can rapidly route and verify complex bus structures.  Join a webinar by Cadence and learn about: Define impedance requirements through the Cross Section EditorUse Constraint Sets (CSets) to apply rules to bus structures -e.g. DDRx buses quickly Leverage Timing vision to route signalsUse Auto-interactive delay tuning to verify compliance with constraints  Save your spot now\, we hope to see you there. \n \n \n \n \n \n \n Register Now URL:https://www.cadmicro.com/event/unleashing-the-power-of-metal-3d-printing/ LOCATION:CAD Micro\, 30 International Blvd\, Unit 1\, Toronto\, Ontario\, M9W 1A2\, Canada CATEGORIES:In Person Event ATTACH;FMTTYPE=image/jpeg:https://www.cadmicro.com/wp-content/uploads/Metal-3D-Printing-Event-Website.jpg ORGANIZER;CN="CAD Micro":MAILTO:contact@cadmicro.com END:VEVENT END:VCALENDAR