BEGIN:VCALENDAR
VERSION:2.0
PRODID:-//CAD MicroSolutions Inc. - ECPv6.15.20//NONSGML v1.0//EN
CALSCALE:GREGORIAN
METHOD:PUBLISH
X-WR-CALNAME:CAD MicroSolutions Inc.
X-ORIGINAL-URL:https://www.cadmicro.com
X-WR-CALDESC:Events for CAD MicroSolutions Inc.
REFRESH-INTERVAL;VALUE=DURATION:PT1H
X-Robots-Tag:noindex
X-PUBLISHED-TTL:PT1H
BEGIN:VTIMEZONE
TZID:America/Toronto
BEGIN:DAYLIGHT
TZOFFSETFROM:-0500
TZOFFSETTO:-0400
TZNAME:EDT
DTSTART:20230312T070000
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:-0400
TZOFFSETTO:-0500
TZNAME:EST
DTSTART:20231105T060000
END:STANDARD
BEGIN:DAYLIGHT
TZOFFSETFROM:-0500
TZOFFSETTO:-0400
TZNAME:EDT
DTSTART:20240310T070000
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:-0400
TZOFFSETTO:-0500
TZNAME:EST
DTSTART:20241103T060000
END:STANDARD
BEGIN:DAYLIGHT
TZOFFSETFROM:-0500
TZOFFSETTO:-0400
TZNAME:EDT
DTSTART:20250309T070000
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:-0400
TZOFFSETTO:-0500
TZNAME:EST
DTSTART:20251102T060000
END:STANDARD
END:VTIMEZONE
BEGIN:VEVENT
DTSTART;TZID=America/Toronto:20241114T130000
DTEND;TZID=America/Toronto:20241114T133000
DTSTAMP:20260505T102300
CREATED:20241029T191111Z
LAST-MODIFIED:20241029T191642Z
UID:67794-1731589200-1731591000@www.cadmicro.com
SUMMARY:AI-Driven Constraint Generation for PCB and IC Package Design
DESCRIPTION:Live				\n				\n					\n		\n				\n			\n						\n				\n					Webinar				\n				\n					\n		\n					\n		\n				\n				\n					November 14 @ 1pm ET				\n				\n				\n				\n							\n			\n						\n		\n						\n				\n				\n				\n					AI-Driven Constraint Generation for PCB and IC Package Design				\n				\n					\n		\n					\n		\n				\n						\n					\n			\n						\n				\n									While constraint-driven design is not a new concept\, the demand for automation and integration between design and analysis tools has grown with increasing design complexity. Optimizing constraints with AI/ML is a driving force for the productivity necessary to address today’s compressed design cycles. Tight integration and complete automation are crucial to enhancing productivity and efficiency. This webinar by Cadence Design Systems introduces the industry’s first constraint generation flow featuring AI-based optimization between Allegro X PCB and IC package implementation tools and Sigrity X Topology Workbench\, a powerful system-level SI/PI environment excelling in what-if/pre-route analysis. Webinar attendees can expect to: Learn how the Sigrity Topology Workbench is linked to the Allegro X Constraint Management environmentExperience the power of AI optimization simulating parameterized structures to arrive at the target objective quickly and how the physical attributes that achieve the target objective are automatically driven into the implementation tool as a constraintEnvision the efficiency of constraint re-use and/or update AI-generated constraints in future designs to continue to meet the goal of reducing design cycle timeSave your spot now\, we hope to see you there! 								\n				\n				\n				\n									\n					\n						\n									Register Now
URL:https://www.cadmicro.com/event/ai-driven-constraint-generation-for-pcb-and-ic-package-design/
CATEGORIES:Webinar
ATTACH;FMTTYPE=image/jpeg:https://www.cadmicro.com/wp-content/uploads/Picture2.jpg
END:VEVENT
END:VCALENDAR